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Resistive memory-based neural differential equation solver for score-based diffusion model.

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Paper

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The authors' code

C · 155 lines · 3.3 KB · no license

  1. #include "common.h"
  3. void GPIO_group_OUT(_gpio_group *group,u16 outdata)
  4. {
  5. u8 t;
  6. for(t=0;t<16;t++)
  7. {
  8. if((outdata&0x8000)>>15)
  9. {
  10. switch(t)
  11. {
  12. case 0: group->data15=1; break;
  13. case 1: group->data14=1; break;
  14. case 2: group->data13=1; break;
  15. case 3: group->data12=1; break;
  16. case 4: group->data11=1; break;
  17. case 5: group->data10=1; break;
  18. case 6: group->data9=1; break;
  19. case 7: group->data8=1; break;
  20. case 8: group->data7=1; break;
  21. case 9: group->data6=1; break;
  22. case 10: group->data5=1; break;
  23. case 11: group->data4=1; break;
  24. case 12: group->data3=1; break;
  25. case 13: group->data2=1; break;
  26. case 14: group->data1=1; break;
  27. case 15: group->data0=1; break;
  28. }
  29. }
  30. else
  31. {
  32. switch(t)
  33. {
  34. case 0: group->data15=0; break;
  35. case 1: group->data14=0; break;
  36. case 2: group->data13=0; break;
  37. case 3: group->data12=0; break;
  38. case 4: group->data11=0; break;
  39. case 5: group->data10=0; break;
  40. case 6: group->data9=0; break;
  41. case 7: group->data8=0; break;
  42. case 8: group->data7=0; break;
  43. case 9: group->data6=0; break;
  44. case 10: group->data5=0; break;
  45. case 11: group->data4=0; break;
  46. case 12: group->data3=0; break;
  47. case 13: group->data2=0; break;
  48. case 14: group->data1=0; break;
  49. case 15: group->data0=0; break;
  50. }
  51. }
  52. outdata<<=1;
  53. }
  54. }
  56. void GPIO_bits_OUT(GPIO_TypeDef* GPIOx, u8 start_bit, u8 bit_size,u16 outdata)
  57. {
  58. u8 i=0;
  59. u16 bu1=0;u16 middata=1;
  61. if( bit_size>(16-start_bit) )
  62. bit_size=16-start_bit;
  64. i=start_bit;
  65. if(i>0)
  66. {
  67. while(i--)
  68. { bu1+=middata; middata*=2;}
  69. }
  71. assert_param(IS_GPIO_ALL_PERIPH(GPIOx));
  73. GPIOx->ODR&=( ( (0xffff<<bit_size) <<start_bit ) |bu1 );
  74. GPIOx->ODR|=(outdata<<start_bit);
  75. }
  78. __asm void WFI_SET(void)
  79. {
  80. WFI;
  81. }
  83. __asm void INTX_DISABLE(void)
  84. {
  85. CPSID I
  86. BX LR
  87. }
  89. __asm void INTX_ENABLE(void)
  90. {
  91. CPSIE I
  92. BX LR
  93. }
  95. __asm void MSR_MSP(u32 addr)
  96. {
  97. MSR MSP, r0 //set Main Stack value
  98. BX r14
  99. }
  102. static u8 fac_us=0;
  103. static u16 fac_ms=0;
  105. void delay_init()
  106. {
  107. SysTick_CLKSourceConfig(SysTick_CLKSource_HCLK_Div8);
  108. fac_us=SYSCLK/8;
  109. fac_ms=(u16)fac_us*1000;
  110. }
  112. void delay_us(u32 nus)
  113. {
  114. u32 midtime;
  115. SysTick->LOAD=nus*fac_us;
  116. SysTick->VAL=0x00;
  117. SysTick->CTRL|=SysTick_CTRL_ENABLE_Msk ;
  118. do
  119. {
  120. midtime=SysTick->CTRL;
  121. }
  122. while((midtime&0x01)&&!(midtime&(1<<16)));
  123. SysTick->CTRL&=~SysTick_CTRL_ENABLE_Msk;
  124. SysTick->VAL =0X00;
  125. }
  127. void delay_xms(u16 nms)
  128. {
  129. u32 midtime;
  130. SysTick->LOAD=(u32)nms*fac_ms;
  131. SysTick->VAL =0x00;
  132. SysTick->CTRL|=SysTick_CTRL_ENABLE_Msk ;
  133. do
  134. {
  135. midtime=SysTick->CTRL;
  136. }
  137. while((midtime&0x01)&&!(midtime&(1<<16)));
  138. SysTick->CTRL&=~SysTick_CTRL_ENABLE_Msk;
  139. SysTick->VAL =0X00;
  140. }
  143. void delay_ms(u16 nms)
  144. {
  145. u8 repeat=nms/540;
  146. u16 remain=nms%540;
  147. while(repeat)
  148. {
  149. delay_xms(540);
  150. repeat--;
  151. }
  152. if(remain)delay_xms(remain);
  153. }

common.c at commit 09d7c4c, no license · at the source

Overview

Authors: Jichang Yang1,2,3, Hegan Chen1,2,3, Jia Chen4, Songqi Wang1,2,3, Qifan Zhu1,2,3, Xinyuan Zhang1,2,3, Yan Zeng1,3, Shaocong Wang5, Mingrui Yang1,2, Yifei Yu1,2, Xi Chen1,2, Bo Wang1,2, Binbin Cui1, Yi Li1,2,3,6,7, Ning Lin1,2, Meng Xu1,2, Yi Li4, Xiaoxin Xu6,7, Xiaojuan Qi1, Xumeng Zhang8
and 6 other authorsDashan Shang6,7, Zhongrui Wang2, Han Wang1,3, Qi Liu8, Kwang-Ting Cheng9, Ming Liu6,8
ORCID iDs: Jichang Yang, Jia Chen, Songqi Wang, Yan Zeng, Shaocong Wang, Yifei Yu, Ning Lin, Meng Xu, Yi Li, Xiaojuan Qi, Xumeng Zhang, Dashan Shang, Zhongrui Wang, Qi Liu, Kwang-Ting Cheng, Ming Liu
  1. Department of Electrical and Computer Engineering, The University of Hong Kong,Hong Kong, China
  2. School of Microelectronics, Southern University of Science and Technology,Shenzhen, China
  3. Center for Advanced Semiconductors and Integrated Circuits, The University of Hong Kong,Hong Kong, China
  4. School of Integrated Circuits, Hubei Key Laboratory for Advanced Memories, Huazhong University of Science and Technology,Wuhan 430074, China
  5. New Cornerstone Science Laboratory, Guangdong Provincial Key Laboratory of In-Memory Computing Chips, School of Electronic and Computer Engineering, Shenzhen Graduate School, Peking University,Shenzhen, China
  6. State Key Lab of Fabrication Technologies for Integrated Circuits and Key Laboratory of Microelectronic Devices and Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences,Beijing, China
  7. School of Integrated Circuits, University of Chinese Academy of Science,Beijing, China
  8. State Key Laboratory of Integrated Chips and Systems, Frontier Institute of Chip and System, Fudan University,Shanghai, China
  9. Department of Electronic and Computer Engineering, The Hong Kong University of Science and Technology,Hong Kong, China
Institutions: University of Hong Kong (Hong Kong SAR China); Southern University of Science and Technology (China); Huazhong University of Science and Technology (China); Peking University (China); Chinese Academy of Sciences (China); University of Chinese Academy of Sciences (China); Fudan University (China); Hong Kong University of Science and Technology (Hong Kong SAR China)
Journal: Nature communications, volume 17, issue 1, article 6354
Dates: received 3 February 2026; accepted 27 April 2026; published online 12 May 2026
Type: Research article · Language: English
License: CC BY-NC-ND
Identifiers: DOI 10.1038/s41467-026-72900-z · PMID 42120416 · PMCID PMC13376740 · OpenAlex W4394673474
Open access: gold, a free copy (OpenAlex)
Preprint: arxiv:2404.05648
Status: code verified
Categories: cognitive (subfield)
Methods: Connectivity
Keywords: Electrical and electronic engineering, Information technology
Topic: Neural Networks and Applications (Artificial Intelligence, Computer Science), according to OpenAlex
Funding: National Natural Science Foundation of China (National Science Foundation of China) (62374181, T2293732, 62488101)
Citations: cited by 1 paper (Europe PMC); 82 references in the paper

Abstract

The abstract is not reproduced here: the paper's license (CC BY-NC-ND) does not allow it. Read it in the paper, at the publisher or on Europe PMC.

Repositories

Its files are read in the Code ↔ Paper reader above.

yangjc97/memristor-sde-diffusion

License: none: the authors keep all their rights
State: the link answers, verified on 28 September 2026
Evidence: files inventoried
Commit: 09d7c4c2d262d0f1a4a8a9848c5d4bd40f201674, 21 April 2026
Languages: C (49), C/C++ (49), Python (4), Jupyter (3)
Size: 197 files, 105 scripts
Software Heritage: archived
Found in: the references
Holds: README, 3 notebooks
Not found: license file, CITATION.cff, environment file, tests, continuous integration, documentation
Tools: PyTorch (6 files), Matplotlib (4 files), NumPy (4 files), pandas (3 files), seaborn (2 files), Pillow (1 file), SciPy (1 file)
Availability: 1 check, the latest on 28 September 2026: the link answers
  • 28 September 2026: the link answers
106 files
At the source: github.com/yangjc97/memristor-sde-diffusion

Zenodo 19591013

License: CC-BY-4.0
State: the link answers, verified on 28 September 2026
Evidence: files inventoried
Size: 1 file
Software Heritage: not checked
Found in: the references
Not found: README, license file, CITATION.cff, environment file, tests, continuous integration, documentation
Tools: PyTorch (6 files), Matplotlib (4 files), NumPy (4 files), pandas (3 files), seaborn (2 files), Pillow (1 file), SciPy (1 file)
Availability: 1 check, the latest on 28 September 2026: the link answers (HTTP 200)
  • 28 September 2026: the link answers (HTTP 200)
106 files
At the source:

Code availability statement

The paper has a code availability statement. Its license (CC BY-NC-ND) does not allow reproducing it here; in short, from what the harvester recognized in it:

  • no repository, dataset or request procedure was recognized in it

Read it in the paper: doi.org/10.1038/s41467-026-72900-z.

Tracing map

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What the map holds:

  • 2 repositories of the authors' code, each at its verified commit, with its license and how the link was found in the paper;
  • 210 scripts, each with its path and the digest of its content;
  • no match between paragraphs and code yet;
  • neither the text of the paper nor the code itself.

Its JSON (tracing-map.json) is deposited on Zenodo with its DOI once the map is validated.

Data

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Data availability statement

The paper has a data availability statement. Its license (CC BY-NC-ND) does not allow reproducing it here; in short, from what the harvester recognized in it:

  • it says that the data are available on request

Read it in the paper: doi.org/10.1038/s41467-026-72900-z.

Versions

The history of this record: each version stored by the harvester or made by a correction of its authors or of the maintainers of its code, and what changed in its facts. The texts of the paper (its abstract, its availability statements) are not part of it; versions that changed only those are not listed.

Version 1, 28 September 2026: the first record

Recorded: type, language, journal, volume, issue, pages, dates, 26 authors, 2 keywords, 1 funder, 41 references.

Cite

This paper

Yang, J., Chen, H., Chen, J., Wang, S., Zhu, Q., Zhang, X., Zeng, Y., Wang, S., Yang, M., Yu, Y., Chen, X., Wang, B., Cui, B., Li, Y., Lin, N., Xu, M., Li, Y., Xu, X., Qi, X., . . . Liu, M. (2026). Resistive memory-based neural differential equation solver for score-based diffusion model. Nature communications, 17(1), 6354. https://doi.org/10.1038/s41467-026-72900-z

BibTeX

@article{yang2026resistive,
author = {Yang, Jichang and Chen, Hegan and Chen, Jia and Wang, Songqi and Zhu, Qifan and Zhang, Xinyuan and Zeng, Yan and Wang, Shaocong and Yang, Mingrui and Yu, Yifei and Chen, Xi and Wang, Bo and Cui, Binbin and Li, Yi and Lin, Ning and Xu, Meng and Li, Yi and Xu, Xiaoxin and Qi, Xiaojuan and Zhang, Xumeng and Shang, Dashan and Wang, Zhongrui and Wang, Han and Liu, Qi and Cheng, Kwang-Ting and Liu, Ming},
title = {{Resistive memory-based neural differential equation solver for score-based diffusion model}},
journal = {Nature communications},
year = {2026},
month = may,
volume = {17},
number = {1},
pages = {6354},
publisher = {Nature Publishing Group},
issn = {2041-1723},
doi = {10.1038/s41467-026-72900-z},
url = {https://doi.org/10.1038/s41467-026-72900-z},
pmid = {42120416},
pmcid = {PMC13376740}
}

RIS

TY - JOUR
AU - Yang, Jichang
AU - Chen, Hegan
AU - Chen, Jia
AU - Wang, Songqi
AU - Zhu, Qifan
AU - Zhang, Xinyuan
AU - Zeng, Yan
AU - Wang, Shaocong
AU - Yang, Mingrui
AU - Yu, Yifei
AU - Chen, Xi
AU - Wang, Bo
AU - Cui, Binbin
AU - Li, Yi
AU - Lin, Ning
AU - Xu, Meng
AU - Li, Yi
AU - Xu, Xiaoxin
AU - Qi, Xiaojuan
AU - Zhang, Xumeng
AU - Shang, Dashan
AU - Wang, Zhongrui
AU - Wang, Han
AU - Liu, Qi
AU - Cheng, Kwang-Ting
AU - Liu, Ming
TI - Resistive memory-based neural differential equation solver for score-based diffusion model
T2 - Nature communications
J2 - Nat Commun
PY - 2026
DA - 2026/05/12
VL - 17
IS - 1
SP - 6354
SN - 2041-1723
PB - Nature Publishing Group
DO - 10.1038/s41467-026-72900-z
UR - https://doi.org/10.1038/s41467-026-72900-z
LA - en
ER -

CSL-JSON

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"id": "10.1038/s41467-026-72900-z",
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"title": "Resistive memory-based neural differential equation solver for score-based diffusion model",
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"author": [
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"family": "Li",
"given": "Yi"
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{
"family": "Xu",
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{
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